1. Field of the Invention
This invention relates generally to integrated circuit fabrication and, more particularly, to printing techniques.
2. Description of the Related Art
As a consequence of many factors, including demand for increased portability, computing power, memory capacity and energy efficiency, integrated circuits are continuously being made more dense. The sizes of the constituent features, e.g., electrical devices and interconnect lines, that form the integrated circuits are constantly being decreased to facilitate this scaling.
The trend of decreasing feature size is evident, for example, in memory circuits or devices such as dynamic random access memories (DRAMs), flash memory, static random access memories (SRAMs), ferroelectric (FE) memories, etc. To take one example, DRAM typically comprises millions of identical circuit elements, known as memory cells. In general, a capacitor-based memory cell, such as in conventional DRAM, typically includes two electrical devices: a storage capacitor and an access field effect transistor. Each memory cell is an addressable location that can store one bit (binary digit) of data. A bit can be written to a cell through the transistor and can be read by sensing charge in the capacitor. Some memory technologies employ elements that can act as both a storage device and a switch (e.g., dendritic memory employing silver-doped chalcogenide glass) and some nonvolatile memories do not require switches for each cell (e.g., magnetoresistive RAM) or incorporate switches into the memory element (e.g., EEPROM). By decreasing the sizes of the electrical devices that constitute a memory cell and the sizes of the conducting lines that access the memory cells, the memory devices can be made smaller. Additionally, storage capacities can be increased by fitting more memory cells on a given area in the memory devices. The need for reductions in feature sizes, however, is more generally applicable to integrated circuits, including general purpose and specialty processors.
The continual reduction in feature sizes places ever greater demands on the techniques used to form the features. For example, photolithography is commonly used to pattern these features. Typically, photolithography involves passing light through a reticle and focusing the light onto a photochemically-active photoresist material. Just as a slide has an image to be projected onto a screen, the reticle typically has a pattern to be transferred to a substrate. By directing light or radiation through the reticle, the pattern in the reticle can be focused on the photoresist. The light or radiation causes a chemical change in the illuminated parts of the photoresist, which allows those parts to be selectively retained, or removed, as desired, relative to parts which were in the shadows. Thus, the exposed and unexposed parts form a pattern in the photoresist. It will be appreciated that this pattern can be used as a mask to form various features of an integrated circuit, including conductive lines or parts of electrical devices.
Because lithography is typically accomplished by projecting light or radiation onto a surface, the ultimate resolution of a particular lithography technique depends upon factors such as optics and light or radiation wavelength. For example, the ability to focus well-defined patterns onto resist depends upon the size of the features and on the wavelength of the radiation projected through the reticle. It will be appreciated that resolution decreases with increasing wavelength, due, among other things, to diffraction. Thus, shorter wavelength radiation is typically required to form well-resolved features, as the sizes of the features decrease. Consequently, to facilitate reductions in feature sizes, lower and lower wavelength systems have been proposed.
For example, 365 nm, 248 nm, 193 nm and 157 nm wavelength systems have been developed as features sizes have decreased. Additional reductions in feature sizes, e.g., down to 20 nm features, may require even shorter wavelength systems. For example, X-ray based lithography, using X-ray radiation instead of light, has been proposed to form very small features, such as 20 nm features. Another proposed technology is extreme ultraviolet (EUV) lithography, using, e.g., 13.7 nm radiation. X-ray and EUV lithography, however, are expected to be prohibitively expensive to implement. In addition to cost, the techniques face various technical obstacles. For example, for X-ray lithography, these obstacles include difficulties in forming high quality reticles which are sufficiently opaque to X-rays and difficulties in devising resists which are sufficiently sensitive to the X-rays. Moreover, rather than using optics to focus radiation on the resist, some X-ray systems place the reticle close to the resist, to directly expose the resist to X-rays passing through the reticle. This can cause complications in aligning the reticle with the resist and, in addition, places significant demands on the flatness of both the reticle and the resist. In addition, X-ray lithography can use reflective as opposed to refractive optics, which can require a complete redesign of optical elements and related systems. Similarly, other high resolution lithography techniques, including ion beam and electron beam lithography, have their own technical and practical obstacles, including high complexity and costs.
Accordingly, there is a continuing need for high resolution methods to pattern small features on semiconductor substrates.